Input/output impedance of a semiconductor element processing a high-frequency signal is generally different from input/output impedance of an external circuit to be connected to the semiconductor element. For example, if an external circuit with an input/output impedance value of 50Ω (Ohm) is connected to a semiconductor element having an input/output impedance value different from 50Ω, mismatching of impedance occurs between the semiconductor element and the external circuit. Therefore, a semiconductor device includes a matching circuit for eliminating the mismatching of impedance with the external circuit (hereinafter simply referred to as a “matching circuit”), which is disposed on the input side and the output side of the semiconductor device for high frequency.
Particularly, when the semiconductor element is a transistor chip having high input and output electric power, a gate width of the transistor chip is large while the impedance of the transistor chip is very low and, therefore, the mismatching of impedance with the external circuit becomes larger. Since a semiconductor device including such a transistor chip has a matching circuit loss made larger depending on a circuit configuration, a component with a high Q-value is used for making up a matching circuit while the matching circuit is disposed within a package so as to reduce the matching circuit loss in a mainstream technique.
An internal matching circuit disposed within a packaged semiconductor device has a high permittivity board expected to produce a wavelength shortening effect, a conductor layer having a conductor pattern formed on a surface of the high permittivity board, and a grounding conductor layer formed on the entire back surface of the high permittivity board, and the internal matching circuit is provided with a capacitance pattern or a microstrip line pattern.
A wire such as a gold wire is used for connecting the transistor chip and the internal matching circuit as well as a lead terminal for connection to an external circuit outside a package and the internal matching circuit. When a high-frequency signal is applied to this wire, the inductance of the wire is not negligible and the inductance of the wire acts as a portion of the internal matching circuit. Therefore, if the length of the wire changes because of displacement of each of the transistor chip and the internal matching circuit or dimension tolerances of the transistor chip and the internal matching circuit, variation occurs in the high-frequency characteristics of the semiconductor device, for example, high-frequency characteristics such as a loss due to mismatching of impedance at a connection point between the external circuit and the semiconductor device and/or a transmission loss in a signal transmission path from the lead terminal to the transistor chip.
To reduce the variation in the high-frequency characteristics as described above, in a method disclosed in Patent Literature 1, grooves are formed in advance on a mounting surface on which a transistor chip and a matching circuit board are mounted, and the transistor chip and the matching circuit board are positioned by using the grooves.
In a method disclosed in Patent Literature 2, a concave portion is formed on a mounting surface on which a circuit board is mounted, and the circuit board is embedded in the concave portion.
In a configuration disclosed in Patent Literature 3, a semiconductor device has a semiconductor element disposed on a convex-shaped pedestal formed on a surface of a carrier plate and has a matching circuit board mounted on the surface of the carrier plate in the vicinity of the pedestal. The pedestal has an inverted trapezoidal cross section (has overhanging side surfaces). This configuration prevents the matching circuit board from partially lying on the pedestal when being mounted on the carrier plate as compared to the case of the pedestal having a trapezoidal cross section.